L6205D013TR;L6205PD013TR;L6205N;L6205D;L6205PD;中文规格书,Datasheet资料

DMOS DUAL FULL BRIDGE DRIVER

ssssssssssOPERATING SUPPLY VOLTAGE FROM 8 TO 52V5.6A OUTPUT PEAK CURRENT (2.8A DC)RDS(ON) 0.3Ω TYP. VALUE @ Tj = 25 °COPERATING FREQUENCY UP TO 100KHzNON DISSIPATIVE OVERCURRENT PROTECTION

PARALLELED OPERATIONCROSS CONDUCTION PROTECTIONTHERMAL SHUTDOWN

UNDER VOLTAGE LOCKOUT

INTEGRATED FAST FREE WHEELING DIODESPowerDIP20 (16+2+2)PowerSO20SO20 (16+2+2)ORDERING NUMBERS:L6205N (PowerDIP20)L6205PD (PowerSO20)L6205D (SO20)TYPICAL APPLICATIONSsBIPOLAR STEPPER MOTORsDUAL OR QUAD DC MOTOR

DESCRIPTIONThe L6205 is a DMOS Dual Full Bridge designed formotor control applications, realized in MultiPower-BLOCK DIAGRAM

BCD technology, which combines isolated DMOSPower Transistors with CMOS and bipolar circuits onthe same chip. Available in PowerDIP20 (16+2+2),PowerSO20 and SO20(16+2+2) packages, theL6205 features a non-dissipative protection of thehigh side PowerMOSFETs and thermal shutdown.VBOOTVCPVBOOTVBOOTCHARGEPUMPOVERCURRENTDETECTION10VGATELOGIC10VVBOOTVSAOCDAOUT1AOUT2ATHERMALPROTECTIONENAIN1AIN2AVOLTAGEREGULATOR10V5VSENSEABRIDGE AOVERCURRENTDETECTIONGATELOGICBRIDGE BOCDBVSBOUT1BENBIN1BIN2BOUT2BSENSEBD99IN1091ASeptember 2003 1/21

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L6205

ABSOLUTE MAXIMUM RATINGS

SymbolVSVOD

Parameter

Supply Voltage

Test conditions

VSA = VSB = VS

Value6060

UnitVV

Differential Voltage betweenVSA = VSB = VS = 60V;

VSA, OUT1A, OUT2A, SENSEA and VSENSEA = VSENSEB = GNDVSB, OUT1B, OUT2B, SENSEBBootstrap Peak Voltage

Input and Enable Voltage RangeVoltage Range at pins SENSEA and SENSEB

Pulsed Supply Current (for each VSA = VSB = VS;VS pin), internally limited by the tPULSE < 1msovercurrent protectionRMS Supply Current (for each VS pin)

Storage and Operating Temperature Range

VSA = VSB = VSVSA = VSB = VS

VBOOTVIN,VENVSENSEA, VSENSEBIS(peak)

VS + 10 -0.3 to +7 -1 to +47.1

VVVA

ISTstg, TOP

2.8-40 to 150

A°C

RECOMMENDED OPERATING CONDITIONS

SymbolVSVOD

Parameter

Supply Voltage

Test Conditions

VSA = VSB = VS

MIN8

MAX5252

UnitVV

Differential Voltage BetweenVSA = VSB = VS;VSA, OUT1A, OUT2A, SENSEA and VSENSEA = VSENSEBVSB, OUT1B, OUT2B, SENSEB

Voltage Range at pins SENSEA (pulsed tW < trr)and SENSEB(DC)RMS Output Current

Operating Junction TemperatureSwitching Frequency

-25-6

-1

VSENSEA, VSENSEBIOUTTjfsw

612.8+125100

VVA°CKHz

2/21

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L6205

THERMAL DATA

SymbolRth-j-pinsRth-j-caseRth-j-amb1Rth-j-amb1Rth-j-amb1Rth-j-amb2

(1)(2)(3)(4)

Description

MaximumThermal Resistance Junction-PinsMaximum Thermal Resistance Junction-CaseMaximumThermal Resistance Junction-Ambient 1Maximum Thermal Resistance Junction-Ambient 2MaximumThermal Resistance Junction-Ambient 3Maximum Thermal Resistance Junction-Ambient 4

PowerDIP20

12-40--56

SO2014-51--77

PowerSO20

-1-351562

Unit°C/W°C/W°C/W°C/W°C/W°C/W

Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the bottom side of 6cm2 (with a thickness of 35µm).Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6cm2 (with a thickness of 35µm).

Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6cm2 (with a thickness of 35µm), 16 via holesand a ground layer.

Mounted on a multi-layer FR4 PCB without any heat sinking surface on the board.

PIN CONNECTIONS (Top View)IN1AIN2ASENSEAOUT1AGNDGNDOUT1BSENSEBIN1BIN2B12345678910D99IN1093A20191817161514131211ENAVCPOUT2AVSAGNDGNDVSBOUT2BVBOOTENBGNDVSAOUT2AVCPENAIN1AIN2ASENSEAOUT1AGND12345678910D99IN1092A20191817161514131211GNDVSBOUT2BVBOOTENBIN2BIN1BSENSEBOUT1BGNDPowerDIP20/SO20PowerSO20 (5)(5)The slug is internally connected to pins 1,10,11 and 20 (GND pins).

3/21

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L6205

PIN DESCRIPTION PACKAGE

SO20/PowerDIP20PIN #12345, 6, 15, 16

PowerSO20PIN #67891, 10, 11,

20

1213141516

IN1AIN2ASENSEAOUT1AGND

Logic InputLogic InputPower SupplyPower Output

GND

Bridge A Logic Input 1.Bridge A Logic Input 2.

Bridge A Source Pin. This pin must be connected to Power Ground directly or through a sensing power resistor.Bridge A Output 1.

Signal Ground terminals. In PowerDIP and SO packages, these pins are also used for heat dissipation toward the PCB.

Bridge B Output 1.

Bridge B Source Pin. This pin must be connected to Power Ground directly or through a sensing power resistor.Bridge B Logic Input 1.Bridge B Logic Input 2.

Bridge B Enable. LOW logic level switches OFF all Power MOSFETs of Bridge B. This pin is also connected to the collector of the Overcurrent and Thermal Protection transistor to implement over current protection.

If not used, it has to be connected to +5V through a resistor.

Bootstrap Voltage needed for driving the upper PowerMOSFETs of both Bridge A and Bridge B.Bridge B Output 2.

Name

Type

Function

7891011

OUT1BSENSEBIN1BIN2BENB

Power OutputPower SupplyLogic InputLogic InputLogic Input (6)

12131417181920

1718192345

VBOOTOUT2BVSBVSAOUT2AVCPENA

Supply VoltagePower Output

Power Supply Bridge B Power Supply Voltage. It must be connected to

the supply voltage together with pin VSA.Power SupplyPower Output

OutputLogic Input (6)

Bridge A Power Supply Voltage. It must be connected to the supply voltage together with pin VSB.Bridge A Output 2.

Charge Pump Oscillator Output.

Bridge A Enable. LOW logic level switches OFF all Power MOSFETs of Bridge A. This pin is also connected to the collector of the Overcurrent and Thermal Protection transistor to implement over current protection.

If not used, it has to be connected to +5V through a resistor.

(6) Also connected at the output drain of the Overcurrent and Thermal protection MOSFET. Therefore, it has to be driven putting in series a

resistor with a value in the range of 2.2kΩ - 180KΩ, recommended 100kΩ

4/21

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L6205

ELECTRICAL CHARACTERISTICS

(Tamb = 25 °C, Vs = 48V, unless otherwise specified)

Symbol

Parameter Test Conditions

Min6.65.6

All Bridges OFF;

Tj = -25°C to 125°C (7)

Typ765

Max Unit7.46.410

VVmA

VSth(ON)Turn-on ThresholdVSth(OFF)Turn-off Threshold

IS

Quiescent Supply Current

Tj(OFF)Thermal Shutdown Temperature165°C

Output DMOS TransistorsRDS(ON)

High-Side Switch ON ResistanceTj = 25 °C

Tj =125 °C (7)

Low-Side Switch ON Resistance

Tj = 25 °CTj =125 °C (7)

IDSS

Leakage Current

EN = Low; OUT = VSEN = Low; OUT = GND

Source Drain DiodesVSDtrrtfr

Forward ON VoltageReverse Recovery TimeForward Recovery Time

ISD = 2.8A, EN = LOWIf = 2.8A

1.15300200

1.3

Vnsns

-0.15

0.340.530.280.47

0.40.590.340.532

ΩΩΩΩmAmA

Logic InputVILVIHIILIIHVth(ON)Vth(OFF)Vth(HYS)

Low level logic input voltageHigh level logic input voltageLow Level Logic Input CurrentHigh Level Logic Input CurrentTurn-on Input ThresholdTurn-off Input ThresholdInput Threshold Hysteresis

0.80.25

GND Logic Input Voltage7V Logic Input Voltage

1.81.30.5

-0.32-10

102.00.87

VVµAµAVVV

Switching CharacteristicstD(on)ENtD(on)INtRISEtD(off)EN

Enable to out turn ON delay time (8)Input to out turn ON delay timeOutput rise time(8)

ILOAD =2.8A, Resistive LoadILOAD =2.8A, Resistive Load

(dead time included)ILOAD =2.8A, Resistive Load

40300

550

100

2501.6

250800400

ns µsns ns

Enable to out turn OFF delay time (8)ILOAD =2.8A, Resistive Load

5/21

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L6205

ELECTRICAL CHARACTERISTICS (continued)(Tamb = 25 °C, Vs = 48V, unless otherwise specified)

SymboltD(off)INtFALLtdtfCP

Parameter Test Conditions

Input to out turn OFF delay timeOutput Fall Time (8)Dead Time ProtectionCharge pump frequency

-25°CILOAD =2.8A, Resistive LoadILOAD =2.8A, Resistive Load

400.5

10.6

1

Min

Typ600

250

Max Unit

nsnsµsMHz

Over Current ProtectionISOVERROPDRInput Supply Overcurrent Protection ThresholdOpen Drain ON ResistanceTj = -25°C to 125°C (7)I = 4mAI = 4mA; CEN < 100pFI = 4mA; CEN < 100pF45.6402001007.160AΩnsnstOCD(ON)OCD Turn-on Delay Time (9)tOCD(OFF)OCD Turn-off Delay Time (9)(7)(8)(9)

Tested at 25°C in a restricted range and guaranteed by characterization.See Fig. 1.See Fig. 2.

Figure 1. Switching Characteristic DefinitionENVth(ON)Vth(OFF)tIOUT90%10%D01IN1316ttFALLtD(OFF)ENtD(ON)ENtRISE6/21

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L6205

Figure 2. Overcurrent Detection Timing DefinitionIOUTISOVERONBRIDGEOFFVEN90%10%tOCD(ON)tOCD(OFF)D02IN13997/21

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L6205

CIRCUIT DESCRIPTION

POWER STAGES and CHARGE PUMPThe L6205 integrates two independent Power MOSFull Bridges. Each Power MOS has an Rd-son=0.3ohm (typical value @ 25°C), with intrinsicfast freewheeling diode. Cross conduction protectionis achieved using a dead time (td = 1µs typical) be-tween the switch off and switch on of two Power MOSin one leg of a bridge.Using N Channel Power MOS for the upper transis-tors in the bridge requires a gate drive voltage abovethe power supply voltage. The Bootstrapped (Vboot)supply is obtained through an internal Oscillator andfew external components to realize a charge pumpcircuit as shown in Figure 3. The oscillator output(VCP) is a square wave at 600kHz (typical) with 10Vamplitude. Recommended values/part numbers forthe charge pump circuit are shown in Table1.Table 1. Charge Pump External Components

Values

CBOOTCPRPD1D2

220nF10nF100Ω1N41481N4148

OPENCOLLECTOROUTPUT(collector) structure, a pull-up resistor REN and a ca-pacitor CEN are connected as shown in Fig. 5. If thedriver is a standard Push-Pull structure the resistorREN and the capacitor CEN are connected as shownin Fig. 6. The resistor REN should be chosen in therange from 2.2kΩ to 180KΩ. Recommended valuesfor REN and CEN are respectively 100KΩ and 5.6nF.More information on selecting the values is found inthe Overcurrent Protection section.Figure 4. Logic Inputs Internal Structure5VESDPROTECTIOND01IN1329Figure 5. ENA and ENB Pins Open Collector

Driving5VRENENA or ENBCEND02IN13495VFigure 3. Charge Pump CircuitVSD1D2RPCPVCPVBOOTVSAVSBD01IN1328CBOOTFigure 6. ENA and ENB Pins Push-Pull Driving 5VRENENA or ENBCEND02IN1350PUSH-PULLOUTPUTLOGIC INPUTSPins IN1A, IN2A, IN1B and IN2B are TTL/CMOS andµC compatible logic inputs. The internal structure isshown in Fig. 4. Typical value for turn-on and turn-offthresholds are respectively Vthon=1.8V andVthoff=1.3V.Pins ENA and ENB have identical input structure withthe exception that the drains of the Overcurrent andthermal protection MOSFETs (one for the Bridge Aand one for the Bridge B) are also connected to thesepins. Due to these connections some care needs tobe taken in driving these pins. The ENA and ENB in-puts may be driven in one of two configurations asshown in figures 5 or 6. If driven by an open drain8/21

TRUTH TABLEINPUTS

ENLHHHH

IN1XLHLH

IN2XLLHH

OUTPUTSOUT1High ZGNDVsGNDVs

OUT2High ZGNDGNDVsVs

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L6205

NON-DISSIPATIVE OVERCURRENT PROTECTIONThe L6205 integrates an Overcurrent Detection Circuit (OCD). This circuit provides protection against a shortcircuit to ground or between two phases of the bridge. With this internal over current detection, the external cur-rent sense resistor normally used and its associated power dissipation are eliminated. Figure 7 shows a simpli-fied schematic of the overcurrent detection circuit.To implement the over current detection, a sensing element that delivers a small but precise fraction of the out-put current is implemented with each high side power MOS. Since this current is a small fraction of the outputcurrent there is very little additional power dissipation. This current is compared with an internal reference cur-rent IREF. When the output current in one bridge reaches the detection threshold (typically 5.6A) the relativeOCD comparator signals a fault condition. When a fault condition is detected, the EN pin is pulled below the turnoff threshold (1.3V typical) by an internal open drain MOS with a pull down capability of 4mA. By using an ex-ternal R-C on the EN pin, the off time before recovering normal operation can be easily programmed by meansof the accurate thresholds of the logic inputs.Figure 7. Overcurrent Protection Simplified SchematicOUT1A VSA OUT2A POWER SENSE1 cell I1A POWER DMOSn cellsOCDCOMPARATORRENCENENARDS(ON)40Ω TYP.I1A / n(I1A+I2A) / nINTERNALOPEN-DRAINIREFI2A POWER DMOSn cellsI2A / nPOWER SENSE1 cellHIGH SIDE DMOSs OFTHE BRIDGE ATO GATELOGICµC or LOGIC++5VOVER TEMPERATURED02IN1353Figure 8 shows the Overcurrent Detection operation. The Disable Time tDISABLE before recovering normal opera-tion can be easily programmed by means of the accurate thresholds of the logic inputs. It is affected whether byCEN and REN values and its magnitude is reported in Figure 9. The Delay Time tDELAY before turning off the bridgewhen an overcurrent has been detected depends only by CEN value. Its magnitude is reported in Figure 10.CEN is also used for providing immunity to pin EN against fast transient noises. Therefore the value of CENshould be chosen as big as possible according to the maximum tolerable Delay Time and the REN value shouldbe chosen according to the desired Disable Time.The resistor REN should be chosen in the range from 2.2KΩ to 180KΩ. Recommended values for REN and CENare respectively 100KΩ and 5.6nF that allow obtaining 200µs Disable Time.9/21

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L6205

Figure 8. Overcurrent Protection WaveformsIOUTISOVERVENVDDVth(ON)Vth(OFF)VEN(LOW)ONOCDOFFONBRIDGEOFFtOCD(ON)tEN(FALL)tD(OFF)ENtOCD(OFF)tEN(RISE)tD(ON)END02IN1400tDELAYtDISABLE10/21

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分销商库存信息:

STM

L6205D013TRL6205D

L6205PD013TRL6205PD

L6205N